VGA stands for Video Graphics Adapter or Video Graphics Array,. It was first introduced with IBM® PS/2 computer in 1987. VGA Controller is the digital circuit designed to drive VGA displays. It reads from Frame Buffer (VGA Memory) which represents the frame to be displayed, and generates necessary data and sync signals for display purpose.
VGA provides 640 x 480 resolution color display screens with a refresh rate of 60 Hz and 16 colors displayed at a time. If the resolution is lowered to 320 x 200, 256 colors are shown, we will do the calculations later. VGA utilizes analog signals, which means it's only capable of lower resolutions and a lower quality display on screens.
How do VGA Monitors Work?
A VGA Monitor can be thought of as a grid of pixels where each pixel is a picture elements that can be set to a specific color. There are 480 rows and each row consists of 640 pixels. The VGA interface works serially, that is, color information for each respective pixels is sent one after the other, as opposed to all at once.
Colors can be represented using a triplet consisting of the intensities of each fundamental color (Red, Green, Blue). The monitor expects these values to be analog, and thus a DAC (Digital to Analog Convertor) is used. The DE2 Educational Board has a 10-bit DAC, that is, it uses 10 bits to represent the intensity of each channel (Red, Green, or Blue), for a total of 30 bits. Depending on the type of monitor and video card you use at home, your computer uses either 16, 24, or 32 bits to encode this color information.
An important fact to realize is that the VGA monitor does not have memory and thus will not store the pixel information being written to it. Instead, the pixels must be continuously sent to the display to achieve a stable image. The VGA Adapter does have memory and will be responsible for constantly sending out the pixel information.
A DE-15 connector, commonly known as a VGA connector, is a three row 15-pin D-subminiature Connector (named after their D-shaped metal shield). The name of each pin is shown in Fig. 1 below. We will only concentrate on the 5 signals out of 15 pins in this project. These signals are Red, Grn, Blue, HS, and VS. Red, Grn, and Blue are three analog signals that specify the color of a point on the screen, while HS and VS provide a positional reference of where the point should be displayed on the screen. By properly driving these five signals according to the VGA timing specification, we can display everything we want on any monitors.
Pin Description of VGA connector:
| PIN | SIGNAL NAME | DESCRIPTION |
|---|---|---|
| 1 | Red | Red video signal |
| 2 | Green | Green video signal |
| 3 | Blue | Blue video signal |
| 4 | MONID(0) | Monitor ID signal 0 |
| 5 | GND | DDCReturn |
| 6, 7, 8 | A GND_VID | Analog video ground |
| 9 | +5V_IO 5 | VPower for I/O device |
| 10 | GND | HSYNC and VSYNC ground |
| 11 | VGA_ID | VGA ID signal |
| 12 | MONID(2) | Monitor ID signal 2 |
| 13 | HSYNC | Horizontal synchronization signal |
| 14 | VSYNC | Vertical synchronization signal |
| 15 | MONID(1) | Monitor ID signal 1 |
What has replaced the VGA connector?
It is not uncommon to still find the VGA cable and connector with today's computers, monitors, projectors, and TVs. However, this type of connector is becoming obsolete and being replaced by the DVI, HDMI, DisplayPort cable and connector.
How can I connect an older VGA monitor to a newer computer?
Newer video cards no longer have VGA connectors, which makes it difficult to use older displays. However, converters can take the VGA signal to a connector supported by the video card.
VGA Calculation
A frame which is the smallest unit of display consists of a number of scan lines. A single frame usually consists of :
For any VGA display chosen, you have to first calculate the frequency of Pixel Clock needed to drive it if it is not given or you have to calculate it and It depends on 3 parameters:
HSYNC and VSYNC signals are generated from Pixel clock and they are the signals which mark the end and beginning of the display area in both the horizontal and vertical scan lines, the VGA signal only displays on the display area. The timing of HSYNC and VSYNC signals depend on number of parameters: Horizontal and Vertical Frontporch, Horizontal and Vertical Backporch, Horizontal and Vertical Display Pixels, Horizontal and Vertical Sync Pulse Widths and Polarities.
Example Timing Calculation for 640x480@60Hz
So, if given:
Pixel clock = approx. 25MHz
Refresh rate = 60 Hz
Horizontal display area = 640 Pixels
Horizontal Back porch BP = 16 Pixels
Horizontal Front porch FP = 16 Pixels
Horizontal Sync Pulse SP = 128 Pixels
Vertical display area = 480 Pixels
Vertical Back porch BP = 29 Pixels
Vertical Front porch FP = 10 Pixels
Vertical Sync Pulse SP = 2 Pixels
Calculate:
Refresh time = 1/60 Hz = 16.67ms
(Refresh rate is 60hz, refresh time is how long it takes to scan one frame)
Pixel time = 1/25 MHz = 0.04µs
(Pixel time, is how long it takes to scan one pixel)
Total horizontal Pixels = 640 + 16 + 16 + 128 = 800 Pixels
Horizontal scan time = 800 * 0.04 µs = 32 µs
(Horizontal scan time is how long it takes to scan one line)
Therefore 16.67ms / 32 µs = 521 Horizontal scan lines per frame
Total Vertical Pixels = 480 + 29 + 10 + 2 = 521 Pixels
Vertical back porch time = 29 Pixels * 32 µs = 0.928ms
Vertical front porch time = 10 Pixels * 32 µs = 0.320ms
Vertical sync time = 2 Pixels * 32 µs = 0.064ms
Vertical display time = 480 Pixels * 32 µs = 15.360ms
Refresh time = (0.928 + 0.320 + 0.064 + 15.360)ms = 16.67 ms
Refresh rate = 1/16.67ms = 60Hz
Frame size = 800 * 521 = 416,800 Pixels
Therefore 416,800 * 0.04 µs = 16.67 ms Refresh time
| s/n | DESCRIPTION | TIME | WIDTH/FREQ |
|---|---|---|---|
| 1 | Pixel Clock | 0.04µs | 25MHz |
| 2 | Refresh rate | 16.67ms | 60Hz |
| 3 | Hor. Sync time | 5.12µs | 128 Pixels/Line |
| 4 | Hor. Back porch | 0.64µs | 16 Pixels/Line |
| 5 | Hor. Front porch | 0.64µs | 16 Pixels/Line |
| 6 | Hor. Display area | 25.60µs | 640 Pixels/Line |
| 6 | Total Hor. Pixel | 32µs | 800 Pixels/Line |
| 7 | Vert. Sync time | 0.064ms | 2 Pixels |
| 8 | Vert. Back porch | 0.928ms | 29 Pixels |
| 9 | Vert. Front porch | 0.320ms | 10 Pixels |
| 10 | Vert. Display area | 15.360ms | 480 Pixels |
| 11 | Total Vert. Pixel | 16.67ms | 521 Pixels |
Hints
First of all, you need a clock divider to generate the pixel clock, which provides a timing reference to HS and VS signals. The pixel clock frequency is 25.175MHz in the specification. However, with ±0.5% accuracy, 25MHz can be acceptable as well. And obviously, 25MHz is easy to generate on your FPGA boards with the clock divider you implemented in previous projects.
Secondly, you need two counters, a counter (horizontal counter) to count pixels in each line and another counter (vertical counter) to count lines in a frame. The horizontal counter needs to reset itself when it reaches the end of the line (799 in this case), and when it resets itself, it needs to provide a Terminal Count signal to the Enable input of vertical counter so that vertical counter can add 1 when a new line begins. Similarly, vertical counter needs to reset itself when it reaches the end of the frame. So, some changes need to be adapted into the counter you implemented in previous projects into this design.
Based on the counter values, we can compare them to the constant defined in the specification to generate HS and VS signals. Note that you have to drive Red, Grn, and Blue to GND outside the display area.
The figure shows how to integrate VGA Controller with a VGA display. You need two more components to complete the system:
One of the simplest and popular Video DACs is ADV7125. It is an 8-bit DAC that converts RGB digital words to 0-0.7 V analog signals and drive the VGA display.
Frame Buffer Design
It is the memory that 'stores' the image to be displayed. It is typically a RAM or sometimes ROM. We will discuss how to design a frame buffer to represent an image. Frame buffer passes this digital info to a Video DAC on command from VGA Controller.
First we have to decide the pixel depth needed. It decides the quality of the image, the variety of colors a pixel can represent. For an 8-bit DAC, we need to represent the primary color components of a pixel: R, G, and B in 8 bits each. It means, a pixel is of 24-bit.
Each pixel is stored in a contiguous manner in Frame Buffer memory locations.
Suppose an image to be displayed is 800x600 pixels.
Therefore Frame Buffer needed is 800x600 = 480000 x 24 bits memory
Total size of the memory is 800x600x24 = 1400 kB approx.
If black and white image, 800x600x1 = 60 kB approx.
Block RAMs maybe used to represent a Frame Buffer in Xilinx FPGAs.
How do Our Monitors Work?
CRT-based VGA displays use amplitude-modulated moving electron beams (or cathode rays) to display information on a phosphor-coated screen. LCD displays use an array of switches that can impose a voltage across a small amount of liquid crystal, thereby changing light permittivity through the crystal on a pixel-by-pixel basis. Although the following description is limited to CRT displays, LCD displays have evolved to use the same signal timings as CRT displays (so the “signals” discussion below pertains to both CRTs and LCDs). Color CRT displays use three electron beams (one for red, one for blue, and one for green) to energize the phosphor that coats the inner side of the display end of a cathode ray tube (see Fig. 2 below).
Electron beams emanate from “electron guns” which are finely-pointed, heated cathodes placed in close proximity to a positively charged annular plate called a “grid.” The electrostatic force imposed by the grid pulls rays of energized electrons from the cathodes, and those rays are fed by the current that flows into the cathodes. These particle rays are initially accelerated towards the grid, but they soon fall under the influence of the much larger electrostatic force that results from the entire phosphor-coated display surface of the CRT being charged to 20kV (or more). The rays are focused to a fine beam as they pass through the center of the grids, and then they accelerate to impact on the phosphor-coated display surface. The phosphor surface glows brightly at the impact point, and it continues to glow for several hundred microseconds after the beam is removed. The larger the current fed into the cathode, the brighter the phosphor will glow.
Between the grid and the display surface, the beam passes through the neck of the CRT where two coils of wire produce orthogonal electromagnetic fields. Because cathode rays are composed of charged particles (electrons), they can be deflected by these magnetic fields. Current waveforms are passed through the coils to produce magnetic fields that interact with the cathode rays and cause them to transverse the display surface in a “raster” pattern, horizontally from left to right and vertically from top to bottom, as shown in Fig. 3. As the cathode ray moves over the surface of the display, the current sent to the electron guns can be increased or decreased to change the brightness of the display at the cathode ray impact point.
Information is only displayed when the beam is moving in the “forward” direction (left to right and top to bottom), and not during the time the beam is reset back to the left or top edge of the display. Much of the potential display time is therefore lost in “blanking” periods when the beam is reset and stabilized to begin a new horizontal or vertical display pass. The size of the beams, the frequency at which the beam can be traced across the display, and the frequency at which the electron beam can be modulated determine the display resolution.
VGA Timing Specification
Modern VGA displays can accommodate different resolutions, and a VGA controller circuit dictates the resolution by producing timing signals to control the raster patterns. The controller must produce synchronizing pulses at 3.3V (or 5V) to set the frequency at which current flows through the deflection coils, and it must ensure that video data is applied to the electron guns at the correct time. Raster video displays define a number of “rows” that corresponds to the number of horizontal passes the cathode makes over the display area, and a number of “columns” that corresponds to an area on each row that is assigned to one “picture element”, or pixel. Typical displays use from 240 to 1200 rows and from 320 to 1600 columns. The overall size of a display and the number of rows and columns determines the size of each pixel.
Video data typically comes from a video refresh memory; with one or more bytes assigned to each pixel location (the Nexys4 uses 12-bits per pixel, Nexys 2, Nexys 3 and Basys2 uses 8-bits). The controller must index into video memory as the beams move across the display, and retrieve and apply video data to the display at precisely the time the electron beam is moving across a given pixel.
A VGA controller circuit must generate the HS and VS timings signals and coordinate the delivery of video data based on the pixel clock. The pixel clock defines the time available to display one pixel of information. The VS signal defines the “refresh” frequency of the display, or the frequency at which all information on the display is redrawn. The minimum refresh frequency is a function of the display's phosphor and electron beam intensity, with practical refresh frequencies falling in the 50Hz to 120Hz range. The number of lines to be displayed at a given refresh frequency defines the horizontal “retrace” frequency.
Cable Quality
The same VGA cable can be used for various supported VGA resolutions, ranging from 320 × 400px @70 Hz, or 320 × 480px @60 Hz (signal bandwidth is 12.6 MHz) to 1280 × 1024px (SXGA) @85 Hz (160 MHz) and up to 2048 × 1536px (QXGA) @85 Hz (388 MHz).
There is no standard that defines the quality required for each resolution, but high-quality cables usually conclude coaxial wiring and insulation, making them thicker. Shorter VGA cables are unlikely to cause significant signal attenuation.
High-quality cables should not be affected by signal crosstalk so that signals in one wire can induce an unwanted current in adjacent wires or ghosting. Ghosting occurs when the impedance does not match, and the ohm (Ω) in the 75 specification causes the signal to be reflected. However, ghosting with long cables may be caused by incorrectly terminated devices or passive cable splitters rather than the cables themselves.
Some high-end monitors and video cards have five independent BNC connectors for RGBHV signals, and five 75-ohm coaxial cables can be used to achieve the highest quality connection. In the 15-pin connector, the red, green, and blue signals (pins 1, 2, and 3) cannot be shielded from each other, so crosstalk may occur in the 15-pin interconnect.
The BNC maintains complete coaxial shielding with circular connectors to prevent crosstalk, but the connectors are very large and bulky. The requirement to press and turn the plug shell to disconnect the connection requires access space around each connector to allow the grasping of each BNC plug shell. BNC usually does not support supplementary signals, such as DDC.
Availability
Newer video cards usually do not have VGA output. The DVI-I output, still containing analog VGA compatible signals, is usually omitted. Thus, if the user wants to connect a monitor or projector with only a VGA input, the user will usually need to use an active converter to receive digital signals from a DVI-D or HDMI or DisplayPort connector and convert them to VGA analog signals. Only older series video cards and motherboards (used with integrated GPUs) may still have VGA or DVI-I connectors.
